NVIDIA AI Updates: October 8, 2026

1. RTX Spark Laptops Open for Preorder, DGX Station Comes to Windows

NVIDIA. At Microsoft’s Windows AI and Surface event in San Francisco, NVIDIA opened preorders for RTX Spark laptops (shipping Friday, Oct. 16), with compact desktops following in November from Acer, ASUS, Dell, HP, Lenovo, Microsoft (Surface Laptop Ultra), MSI and Gigabyte. RTX Spark pairs a Blackwell RTX GPU with up to 6,144 cores and an up to 20-core Grace CPU over a 600 GB/s link, delivering 1 petaflop of FP4 and up to 128GB of unified memory running the full CUDA stack. NVIDIA also previewed DGX Station for Windows, built on the GB300 Grace Blackwell Ultra Desktop Superchip with 748GB of coherent memory and up to 20 petaflops of FP4, aimed at running models up to roughly a trillion parameters locally with Linux toolchains reachable through WSL. Source

2. Nemotron 3 Ultra Fine-Tunes Reach Gold-Level Scores at IOI and IMO 2026

NVIDIA. NVIDIA reported that Nemotron-3-Ultra-CC (550B total, 55B active parameters) scored 535.4/600 on IOI 2026 problems in an unofficial, unsupervised run, above the 361.12 gold threshold, while a generate-verify-refine system built on Nemotron 3 Ultra general, SFT and RL checkpoints scored 30/42 on IMO 2026 as graded by official IMO graders (gold cutoff 29). Training used 22,000 curated competitive programming problems for IOI and a 414,890-example proof corpus across 15,818 problems for IMO SFT, with RL on 9,597 proof problems. The checkpoints, both IMO training datasets, a 200-problem Nemotron-IMO-Bench, and the inference pipelines in NeMo-Skills are released. Source

3. cuOpt Adds Multi-GPU mPDLP for Linear Programs Beyond 100M Variables

NVIDIA. cuOpt now includes mPDLP, a multi-GPU Primal-Dual Hybrid Gradient LP solver that splits the constraint matrix across NVLink-connected GPUs using min-cut partitioning of its bipartite graph to cut cross-GPU traffic. On eight B200 GPUs it reached up to 4.2x end-to-end speedup over single-GPU PDLP (11.4x on the PDLP steps) on large instances, with up to 6x lower peak memory per GPU and support for LPs up to 2.1B nonzeros. Kinaxis reported 3.3x on a 135M-variable supply chain LP using eight H100s, and PSR more than 5x on a 185M-variable energy expansion model; a tutorial notebook is in the cuopt-examples repo. Source

4. NVIDIA Robotics Lab Details Robot Assembly of GB300 Tester Trays

NVIDIA. NVIDIA’s Seattle Robotics Lab and Isaac team described automating GB300 tester-tray assembly with Flexiv Rizon 4S arms and a UR10e: a classical pipeline handles busbar assembly at over 95% success (160 s cycle vs. a 124 s target), and connector insertion combines SAM3 segmentation, a DOPER pose estimator, Isaac Lab sim-to-real RL and a real-world residual policy (SPARR) for 90 to 95% success. The team reports behavior cloning struggled due to scarce high-quality data and that real-world data remained essential alongside synthetic data. The system is not yet deployed against the 99.5% success goal, and NVIDIA plans to release DOPER, the TALOS orchestration system and connector-insertion reference workflows. Source