NVIDIA AI Updates: October 13, 2026

1. NVIDIA Contributes Vera Rubin Rack Designs and MGX 1.2 to OCP

NVIDIA. At the OCP Global Summit, NVIDIA contributed Vera Rubin rack and compute tray designs through its MGX architecture, with MGX 1.2 adding blind-mate liquid cooling, a liquid-cooled 5,000A busbar, and rack deployments up to 250kW, plus a Vera CPU rack spec for agent orchestration and tool-calling workloads. It also open-sourced DSX components including a Cluster Readiness Engine for pre-training GPU stress tests and a Rack Management Service. Meta is adopting Spectrum-6 102.4Tb/s Ethernet switches, which spread traffic across up to eight network planes for clusters of 100,000+ GPUs, and Google’s Falcon Transport will be supported on future ConnectX-10 SuperNICs and BlueField DPUs. Source

2. NVIDIA and Cisco Introduce USFP Pluggable Optics at 400Gb/s per Lane

NVIDIA. NVIDIA and Cisco announced USFP, a pluggable optics form factor with roughly the footprint of OSFP that runs 400Gb/s per lane across 16 lanes, with a path to 32. The companies cite four times the bandwidth density of 200Gb/s pluggables and about 1.3x better power efficiency, with TE Connectivity and Amphenol working on components. No ship date was given. Source

3. ReplaySSM Speeds Hybrid-Model Decoding by Caching SSM Inputs Instead of State

NVIDIA. NVIDIA and Princeton’s Dao AI Lab detailed ReplaySSM, which stores state-space layer state as a periodic checkpoint plus a buffer of recent inputs, roughly halving dominant state memory traffic. On Nemotron-3 and Qwen3.5 hybrid models on H100 and B300, it delivered 1.46x to 1.80x kernel speedups and 1.20x to 1.47x end-to-end decode speedups at batch size 256 over tuned vLLM kernels, and 1.85x to 2.10x higher speculative decoding throughput on the 120B-class models at batch size 512. Code is on GitHub, the paper is arXiv 2610.13778, and integrations exist for TensorRT-LLM, vLLM, SGLang, and FlashInfer, though gains are negligible at batch size 1. Source